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Curriculum subject

Digital Systems Design

Subject
Subject code IAX0600
Subject name Digital Systems Design
Credit points 6 ECTS
Grading method Differentiated assessment (letters)
Curriculum subject
Curriculum 2019 CNS/TECH
Study year 3
Semester Fall semester
Subject type Optional
Specialization Communication and Navigation Systems
Higher Education Institution
Tallinn University of Technology
Goal of subject
• To elaborate knowledge of the design process from design description in VHDL through functional simulation, synthesis, timing simulation, and FPGA/PSoC programming.
• To gain experience in designing and verifying digital systems using synthesis and simulation tools.
• To provide students the theory and practice of rapid prototyping of digital systems in a laboratory environment.
Learning outcomes of the subject
Having finished the study of the subject a student :
• can proceed from a digital system description in VHDL to its implementation in programmable logic (FPGA) and programmable system-on-chip (PSoC) using of a number of computer-aided design software tools;
• can analyse design tool outputs in evaluating alternative system designs for a specific set of requirements, and how to use the knowledge gained to improve the design;
• can integrate heterogeneous blocks such as digital hardware and analog interfaces while optimizing power consumption, performance, cost;
• can correctly use different tools from state-of-the-art industrial computer-aided design systems.
Subject course description
Overview of the main topics of digital design. Digital systems design methodology using VHDL and FPGA/PSoC. Programmable logic (FPGAs) and programmable system-on-chip (PSoCs) as means for building reconfigurable systems. Rapid prototyping of digital systems.
The most important feature of the course is continuous evaluation based on simple but complete mini-projects. Such projects have to be implemented starting from the initial specification (given by instructors and discussed with students) to the final implementation in FPGA/PSoC.
Current rounds
None
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